This invention relates generally to regulated power converters and more particularly to a power controller employed therein. Various ways of performing both power conversion and regulation in regulated power converters are known in the prior art. Switch-mode operation is a common power conversion technique. Pulse width modulation (PWM) is commonly used to accomplish regulation in switch-mode power converters. The device(s) which use the regulation information to control switching of the power device(s) is known as a power controller. One popular prior art power controller method is known as current-mode control. In this control method, current in the converter is monitored and regulation information is used to control the level of current at which the power device(s) will be turned off during a switching period.
A commonly used current-mode power controller is known in the prior art as the 3842 controller. It is available in an eight-pin package, with the following pin functions and a notation of whether a particular pin represents an input or an output:
PIN 1--Compensation (Output) PA1 PIN 2--Feedback (Input) PA1 PIN 3--Current Sense (Input) PA1 PIN 4--Oscillator Timing (Input) PA1 PIN 5--Ground PA1 PIN 6--Driver (Output) PA1 PIN 7--Supply Rail (Input) PA1 PIN 8--Voltage Reference (Output)
FIG. 1 illustrates an example of how a prior art 3842 controller may be incorporated in an application circuit. Only the opto-transistor portion of the opto-coupler is shown, with the opto-LED presumably being driven by an error signal. A toggle latch is shown in dotted lines to represent an option which, when implemented, limits the duty cycle to below 50%. The controller is known as the 3844 controller when this option is included, but is otherwise equivalent to the 3842 controller. In the discussion that follows, the term 3842 refers to either the 3842 controller or the 3844 controller, unless otherwise noted.
One disadvantage of the 3842 controller in the illustrated application is that the operational amplifier that is built into the 3842 is only used as an inverting low gain (i.e. 1-5) amplifier, with the noise filtering capacitor probably a practical necessity. The 3842 seems more suited to regulating a non-isolated output where the operational amplifier performs a useful purpose.
The reference pin of the 3842 serves no purpose here other than to supply charge current through the timing resistor RT to the timing capacitor CT, which is not a very efficient utilization. Slope compensation, required to prevent subharmonic oscillation if the duty ratio is greater than 50%, is not implemented in the 3842 controller circuit application of FIG. 1. Slope compensation would require several external components.
An undesirable condition commonly found in current-mode controlled power converters, especially when operating at higher switching frequencies, is that the output current may substantially exceed the commanded value under the condition of a short circuited output. In the prior art circuit of FIG. 1, the commanded value is proportional to the controlling voltage at pin 1. A voltage signal proportional to the current signal being controlled is applied at pin 3. In the event of overload or shorted output of the converter, in each switching cycle the current signal reaches the value corresponding to the maximum controlling voltage and initiates the turn-off of the main power switch of the converter. Due to circuit delays, both internal and external, the turn-off of the main power switch does not coincide exactly with the instant the current signal exceeds the controlling level; rather, it is delayed by typically several hundred nonoseconds. The ratio of that delay time and the clock period sets an effective limit for the achievable minimum duty ratio of the power switch of the converter. Even if the current waveform overshoots the controlling level every switching cycle, the 3842 is not able to further reduce the duty ratio and, therefore, is not able to bring the current down to the commanded level. The result is that the output current of the converter rises substantially above the desired maximum level, the shape of the output voltage-current characteristic and the exact value of the short-circuit current depending on a fortuitous combination of parasitic circuit parameters: winding resistances and leakage inductance of the transformer, external and internal time delays, voltage drops in the power switch and the output transistor. The end result is excess heat dissipation and possible failure of the converter. (The phenomenon of the output current exceeding its commanded value at heavy overload or short-circuited output is called "short-circuit current runaway." A detailed discussion and mathematical analysis of the short-circuit current runaway can be found in the paper by R. Redl and N.O. Sokal, "Overload protection methods for switching-mode dc/dc converters: classification, analysis, and improvements, " PESC '87 Record [IEEE Catalog no. 87CH2459 -6], pp. 107-118).
It is therefore a principal object of the present invention to provide a primary side controller implemented as a monolithic integrated circuit that eliminates the disadvantages of the prior art 3842 controller described above.
It is a further object of the present invention to provide a primary side controller implemented as a monolithic integrated circuit in which fewer pins are required to provide a similar or improved function over that provided by the prior art 3842 controller described above.
It is a further object of the present invention to provide a primary side controller including a current limit protection function having an extended time period over which a predetermined current value is reached.